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CHAPTER 8 FUNCTIONS
8
8.2 Cyclic Transmission
8.2.3 Assurance of cyclic data integrity
(a) Access to cyclic data
When link devices are accessed, the integrity of the 32-bit data can be assured by accessing RWr and RWw
with the following conditions satisfied:
• The start device number of RWr/RWw is multiples of 2.
• The number of points assigned to RWr/RWw is multiples of 2.
For data assurance of more than 32 bits, use the block data assurance per station or interlock programs.
2 words
(32 bits)
0
H
Access by using start
device No. which is
multiples of 2 and
in 2-word (32-bit) units
1H
2H
3H
4H
5H
6H
7H
RWr, RWw
Master/local module
Device
Safety CPU module
Link refresh
2 words
(32 bits)
2 words
(32 bits)
2 words
(32 bits)
2 words
(32 bits)
2 words
(32 bits)
2 words
(32 bits)
2 words
(32 bits)