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DMA channel registers
136
NS7520 Hardware Reference, Rev. D 03/2006
Buffer Descriptor Pointer register
Address: FF90 0000 / 20 / 40 / 60 / 80 / A0 / C0 / E0 / 100 / 120 / 140 / 160 / 180 /
1A0 / 1C0 / 1E0
The Buffer Descriptor Pointer register contains the address of the first buffer
descriptor in a contiguous list of descriptors.
DMA channel 1 is unique in that it supports four different buffer descriptors: A, B, C,
and D. Each buffer descriptor contains a separate ring of descriptors, and identifies a
block of data buffers with a different size. This feature allows the Ethernet receiver
to choose the optimum buffer size for the incoming packet.
DMA Control register
Address: FF90 0010 / 30 / 50 / 70 / 90 / B0 / D0 / F0 / 110 / 130 / 150 / 170 / 190 /
1B0 / 1D0 / 1F0
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Buffer descriptor pointer
Buffer descriptor pointer
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
BB BTE REQ SINC_ SIZECE MODE
STATE INDEX
CA
RSVD
DINC_ Reserved