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EFE configuration
202
NS7520 Hardware Reference, Rev. D 03/2006
Register hash table
The MAC receiver provides the station address logic (SAL) with a 6-bit CRC value. This
value points to a bit position in the 64-bit multicast hash table. A receive packet is
accepted if the current frame is a multicast frame and the 6-bit CRC addresses a bit
in the hash table that is set to 1. Otherwise, the packet is rejected.
The 64-bit address value is held in four registers, each containing 16 bits. The least
significant bit of the first register corresponds to a CRC value of 0. The most
significant bit of the last register corresponds to the CRC value of 63.
The multicast address bytes are loaded into the Station Address registers in Little
Endian format.
Multicast hash table entries and bit definitions
Address: FF80 05D0
Address: FF80 05D4
Bits Access Mnemonic Reset Description
D31:16 N/A Reserved N/A N/A
D15:00 R/W HT1 0 CRC value 15–0
Table 81: HT1 bit definition
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
HT1
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
HT2