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SYS Module
Notes:
1
Digi guarantees that the NS7520B-1-C36 will work at all frequencies up to
36.9MHz.
2 Digi guarantees that the NS7520B-1-C46 will work at all frequencies up to
46.1MHz.
3 Digi guarantees that the Ns7520B-1-C55 will work at all frequencies up to
55.3MHz.
Reset circuit sources
There are three reset circuit sources: external, watchdog, and software.
External reset. Powerup reset is initiated when the RESET_ input is
asserted low when power is applied. RESET_ should be driven low for at
least 40ms after power has reached safe operating levels, to allow external
crystals to start up. At other times, RESET_ must be one microsecond
minimum.
Watchdog reset. The watchdog reset is synchronous to SYS_CLK. A
hardware reset condition is triggered when the signal transitions from
active to inactive state.
Software reset. The CPU can also trigger a software reset by writing ‘h123
and ‘h321 to the Software Service register (see "Software Service register,"
beginning on page 70). Unless otherwise noted, configuration registers are
not reset by a software reset. When a software reset is triggered, the
appropriate modules are reset for a total of 16
sys_clk periods.
87.6 E 11 10011 0x00000112
92.2 F 11 10100 0x00000113
MHz PLLCNT IS ND+1 PLL Settings register Notes