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GEN Module
D22 R/C WDOG N/A Last reset caused by watchdog timer
When set to 1, indicates that a watchdog timeout
occurred and generated an internal hardware reset
condition.
Note: Because the RESET_ pin is not asserted,
this reset does not initialize internal
parameters as described in "NS7520
bootstrap initialization" on page 60.
WDOG is set/reset during every reset condition.
Clear this bit by writing
‘hF in bits 23:20.
D21 R/C PLL N/A Last reset caused by PLL update
When set to 1, indicates that the PLL was updated
and required an internal hardware reset.
Note: When the software modifies the PLL
settings the RESET_ pin is not asserted,
this reset does not initialize internal
parameters as described in "NS7520
bootstrap initialization" on page 60.
PLL is set/reset during every reset condition. Clear
this bit by writing
‘hF in bits 23:20.
D20 R/C SOFT N/A Last reset caused by software reset
When set to 1, indicates that a soft reset was
triggered by software (see "Software Service
register" on page 70).
Note: Because the RESET_ pin is not asserted,
this reset does not initialize internal
parameters as described in "NS7520
bootstrap initialization" on page 60.
SOFT is set/reset during every reset condition.
Clear this bit by writing
‘hF in bits 23:20.
D19:11 N/A Reserved N/A N/A
D10:00 R/O GEN_ID
ADDR19:
09
Product ID defined by external resistor jumpers
Defaults to the value defined by ADDR19:09 (see
"NS7520 bootstrap initialization" on page 60)
during a hardware reset.
Bits Access Mnemonic Reset Description
Table 25: System Status register bit definition