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GEN module registers
78
NS7520 Hardware Reference, Rev. D 03/2006
PORTC configuration
The CSF, CDIR, and CMODE bits together provide independent configuration of each
pin. Each column in this table denotes one of the possible configurations for each bit.
If there is no entry in one of the columns (for example,
PORTC7>CMODE=1>CDIR=0), the
bit cannot be used in that configuration.
D07:00 R/W CDATA 0 PORTC data register
Used when a PORTC bit is configured to operate in
GPIO mode.
Reading the CDATA field provides the current
state of the GPIO signal, regardless of its
configuration mode.
Writing the CDATA field defines the current
state of the GPIO signal when the signal is
defined to operate in GPIO output mode.
Writing the CDATA field when configured in
GPIO input mode or special function mode has
no effect.
Each bit in the CDATA field corresponds to one of
the PORTC bits; D07 controls PORTC7, D06
controls PORTC6, and so on.
PORTC
bit
CSF=0
CMODE=0 CMODE=1
CDIR=0 CDIR=1 CDIR=0 CDIR=1
PORTC7 GPIO IN GPIO OUT IRQOUT_
PORTC6 GPIO IN GPIO OUT DTR_
PORTC5 GPIO IN GPIO OUT RTS_
PORTC4 GPIO IN GPIO OUT RIB_ RESET_OUT_
PORTC3 GPIO IN GPIO OUT LEVELIRQ3=CDIR3
PORTC2 GPIO IN GPIO OUT LEVELIRQ2=CDIR2
Table 32: PORTC configuration
Bits Access Mnemonic Reset Description
Table 31: PORTC register bit definition