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SDRAM read cycles..............................................................120
SDRAM write cycles.............................................................122
Peripheral page burst size ...........................................................124
Chapter 8:
DMA Module.......................................................... 127
DMA module ............................................................................128
Fly-by operation transfers.....................................................128
Memory-to-memory operation................................................129
DMA buffer descriptor ................................................................130
DMA channel assignments ............................................................133
DMA channel registers ................................................................134
Address map .....................................................................134
Buffer Descriptor Pointer register ...........................................136
DMA Control register ...........................................................136
DMA Status/Interrupt Enable register .......................................142
Ethernet transmitter considerations................................................144
Ethernet receiver considerations ...................................................145
External peripheral DMA support....................................................145
Signal description...............................................................146
External DMA configuration ...................................................146
Memory-to-memory mode .....................................................146
DMA controller reset ..................................................................147
Chapter 9:
Ethernet Module .................................................. 149
Ethernet front-end (EFE) .............................................................150
Transmit and receive FIFOs ...................................................151
EFE transmit processing .......................................................151
EFE receive processing.........................................................151
Receive buffer descriptor selection .........................................152
External CAM filtering ................................................................153
MAC module ............................................................................154
MAC module block diagram ...................................................154
DMA channel assignments ............................................................156
EFE configuration......................................................................156
Ethernet General Control register (EGCR) bit definitions ................158
Ethernet General Status register (EGSR) bit definitions..................164