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Exception vector table.......................................................... 33
Detail of ARM exceptions ....................................................... 34
Entering and exiting an exception (software action) ...................... 37
Hardware Interrupts.................................................................... 39
FIRQ and IRQ lines ............................................................... 39
Interrupt controller.............................................................. 39
Interrupt sources................................................................. 40
Chapter 4:
BBus Module ...........................................................43
BBus masters and slaves............................................................... 44
Cycles and BBus arbitration........................................................... 44
Address decoding ....................................................................... 45
Chapter 5:
SYS Module.............................................................47
Signal description....................................................................... 48
JTAG support............................................................................ 48
ARM debug ............................................................................... 49
System clock generation (NS7520 clock module) .................................. 49
External oscillator vs. internal PLL circuit................................... 49
NS7520 clock module block diagram.......................................... 50
Using the external oscillator.......................................................... 50
External oscillator mode hardware configuration .......................... 51
Using the PLL circuit ................................................................... 52
PLL mode hardware configuration ............................................ 52
Setting the PLL frequency............................................................. 54
PLL Settings register: Setting the PLL frequency on bootup.............. 54
PLL Control register: Setting the PLL frequency with the PLL Control
register ............................................................................ 57
Reset circuit sources ................................................................... 59
NS7520 bootstrap initialization....................................................... 60
Chapter 6: GEN Module
.............................................................61
Module configuration................................................................... 62
GEN module hardware initialization................................................. 62
GEN module registers .................................................................. 63