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Working with the CPU
The ARM instruction set yields a 0.9 Dhrystone (2.1) rating MIPS/MHz of instruction
executions; the Thumb instruction set yields 0.75 Dhrystones MIPS/MHz. The MHz
rating reflects the rate at which instructions can be fetched from external flash
memory, as shown in this table:
Working with ARM exceptions
Exceptions occur when the normal flow of a program is halted temporarily; for
example, to service an interrupt from a peripheral. Each ARM exception causes the
ARM processor to save some state information, then jump to a location in low
memory (referred to as the vector table; see "Exception vector table" on page 33).
Before an exception can be handled, the current processor state must be preserved
so the original program can resume when the handler routine has finished.
System bus
size Code style RISC speed
System bus
speed
Wait
states
Instruction
cycle time
Dhrystone
rating
Thumb mode
16-bit Thumb 25 MHz 25 MHz 1 120 ns N/A
16-bit Thumb 25 MHz 25 MHz 0 80 ns N/A
16-bit Thumb 36 MHz 36 MHz 3 125 ns N/A
16-bit Thumb 46 MHz 46 MHz 4 109 ns N/A
16-bit Thumb 55 MHz 55 MHz 5 108 ns N/A
ARM mode
32-bit ARM 36 MHz 36 MHz 3 125 ns 6.8
32-bit ARM 46 MHz 46 MHz 4 109 ns 8.6
32-bit ARM 55 MHz 55 MHz 5 108 ns 10.4
Table 16: ARM performance