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ARM Thumb concept
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NS7520 Hardware Reference, Rev. D 03/2006
ARM Thumb concept
The ARM7TDMI processor uses a unique architectural strategy known as Thumb, which
makes the processor ideally suited to high-volume applications with memory
restrictions or applications for which code density is an issue.
Thumb code’s primary attribute is a super-reduced instruction set. The ARM7TDMI
processor has essentially two instruction sets:
Standard 32-bit ARM set
16-bit Thumb set
Thumb’s 16-bit instruction length allows it to approach twice the density of standard
ARM code while retaining most of the ARM’s performance advantage over a
traditional 16-bit processor using 16-bit registers. Thumb code operates on the same
32-bit register set as the ARM code, but consumes only 65% of the same code
compiled in ARM mode.
Thumb instructions operate with the standard ARM register configuration, allowing
interoperability between ARM and Thumb states. Each 16-bit Thumb instruction has a
corresponding 32-bit ARM instruction with the same effect on the processor model.
Thumb architecture provides a Thumb instruction decoder in front of the standard
32-bit ARM processor. The Thumb instruction decoder basically remaps each 16-bit
Thumb instruction into a 32-bit standard ARM instruction. The Thumb instruction set
typically requires 30% more instructions to perform the same task as 32-bit
instructions, but the Thumb instruction can fit twice as many instructions in the code
space. The net result is a 35% decrease in overall code density.
CPU performance
The ARM7TDMI core does not contain cache, and runs as fast as instructions can be
fetched. The performance rating for the ARM RISC depends on system bus speed and
cycle time. Performance is also affected by the size of the system bus and the type of
code (ARM or Thumb) being executed.