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EFE configuration
164
NS7520 Hardware Reference, Rev. D 03/2006
Ethernet General Status register (EGSR) bit definitions
Address: FF80 0004
General information
These fields are used only when using Ethernet receive in interrupt service mode
rather than DMA mode (DMA interface logic). DMA mode provides higher performance
out of the Ethernet chip, and can be turned on and off.
Register bit assignment
RXFDB RXSKIP
RXREGR TXREGE
RXFIFOH TXFIFOH
RXBR TXBC
Bits Access Mnemonic Reset Description
D31:30 N/A Reserved N/A N/A
Table 55: Ethernet General Status register bit definition
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
RXFDB Reserved
Reserved
RX
REGR
RXPINS
RX
SKIP
TX
REGE
TX
FIFOH
TXBC
TX
FIFOE
RX
FIFOH
RXBR
Reserved