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ARM INSTRUCTION SET S3C2410A
3-60
Division and Remainder
A number of divide routines for specific applications are provided in source form as part of the ANSI C library provided
with the ARM Cross Development Toolkit, available from your supplier. A short general purpose divide routine follows.
; Enter with numbers in Ra and Rb.
MOV Rcnt,#1 ; Bit to control the division.
Div1 CMP Rb,#0x80000000 ; Move Rb until greater than Ra.
CMPCC Rb,Ra
MOVCC Rb,Rb,ASL#1
MOVCC Rcnt,Rcnt,ASL#1
BCC Div1
MOV Rc,#0
Div2 CMP Ra,Rb ; Test for possible subtraction.
SUBCS Ra,Ra,Rb ; Subtract if ok,
ADDCS Rc,Rc,Rcnt ; Put relevant bit into result
MOVS Rcnt,Rcnt,LSR#1 ; Shift control bit
MOVNE Rb,Rb,LSR#1 ; Halve unless finished.
BNE Div2 ; Divide result in Rc, remainder in Ra.
Overflow Detection in the ARM920T
1. Overflow in unsigned multiply with a 32-bit result
UMULL Rd,Rt,Rm,Rn ; 3 to 6 cycles
TEQ Rt,#0 ; +1 cycle and a register
BNE overflow
2. Overflow in signed multiply with a 32-bit result
SMULL Rd,Rt,Rm,Rn ; 3 to 6 cycles
TEQ Rt,Rd ASR#31 ; +1 cycle and a register
BNE overflow
3. Overflow in unsigned multiply accumulate with a 32-bit result
UMLAL Rd,Rt,Rm,Rn ; 4 to 7 cycles
TEQ Rt,#0 ; +1 cycle and a register
BNE overflow
4. Overflow in signed multiply accumulate with a 32-bit result
SMLAL Rd,Rt,Rm,Rn ; 4 to 7 cycles
TEQ Rt,Rd, ASR#31 ; +1 cycle and a register
BNE overflow