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S3C2410A I/O PORTS
9-7
PORT CONTROL DESCRIPTIONS
PORT CONFIGURATION REGISTER (GPACON-GPHCON)
In the S3C2410A, most pins are multiplexed. So, It is require to determine which function is selected for each pin.
port control register (PnCON) determines the function of each pin.
If GPF0 – GPF7 and GPG0 – GPG7 are used for wakeup signals in Power-OFF mode, these ports must be
configured in Interrupt mode.
PORT DATA REGISTER (GPADAT-GPHDAT)
If ports are configured as output ports, data can be written to the corresponding bit of the PnDAT. If ports are
configured as input ports, the data can be read from the corresponding bit of the PnDAT.
PORT PULL-UP REGISTER (GPBUP-GPHUP)
The port pull-up register controls the pull-up resister enable/disable of each port group. When the corresponding bit is
0, the pull-up resister of the pin is enabled. When 1, the pull-up resister is disabled.
If the port pull-up register is enabled, the pull-up resisters work without pin's functional setting (input, output, DATAn,
EINTn, etc).
MISCELLANEOUS CONTROL REGISTER
This register controls DATA port pull-up resister, hi-z state, USB pad, and CLKOUT selection.
EXTERNAL INTERRUPT CONTROL REGISTER (EXTINTN)
The 24 external interrupts are requested by various signaling methods. The EXTINTn register configures the signaling
method among the low level trigger, high level trigger, falling edge trigger, rising edge trigger, and both edge trigger for
the external interrupt request.
The 8 external interrupt pin has a digital filter (refer to EINTFLTn on page 9-25).
Only 16 EINT pins (EINT [15:0]) are used for wakeup sources.
POWER_OFF MODE AND I/O PORTS
All GPIO register values are preserved in Power_OFF mode. Refer to the Power_OFF mode in the chapter, Clock &
Power Management.
The EINTMASK can't prohibit the wake-up from Power_OFF mode, But, If ENTMASK is masking one of EINT[15:4],
the wake-up can be done but the EINT4_7 bit and EINT8_23 bit of the SRCPND will not set to 1 just after the wake-
up.