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I/O PORTS S3C2410A
9-14
PORT E CONTROL REGISTERS (GPECON, GPEDAT, and GPEUP)
Register Address R/W Description Reset Value
GPECON 0x56000040 R/W Configure the pins of port E 0x0
GPEDAT 0x56000044 R/W The data register for port E Undefined
GPEUP 0x56000048 R/W pull-up disable register for port E 0x0
Reserved 0x5600004C – Reserved Undefined
GPECON Bit Description
GPE15 [31:30] 00 = Input 01 = Output (open drain output)
10 = IICSDA 11 = Reserved
GPE14 [29:28] 00 = Input 01 = Output (open drain output)
10 = IICSCL 11 = Reserved
GPE13 [27:26] 00 = Input 01 = Output
10 = SPICLK0 11 = Reserved
GPE12 [25:24] 00 = Input 01 = Output
10 = SPIMOSI0 11 = Reserved
GPE11 [23:22] 00 = Input 01 = Output
10 = SPIMISO0 11 = Reserved
GPE10 [21:20] 00 = Input 01 = Output
10 = SDDAT3 11 = Reserved
GPE9 [19:18] 00 = Input 01 = Output
10 = SDDAT2 11 = Reserved
GPE8 [17:16] 00 = Input 01 = Output
10 = SDDAT1 11 = Reserved
GPE7 [15:14] 00 = Input 01 = Output
10 = SDDAT0 11 = Reserved
GPE6 [13:12] 00 = Input 01 = Output
10 = SDCMD 11 = Reserved
GPE5 [11:10] 00 = Input 01 = Output
10 = SDCLK 11 = Reserved
GPE4 [9:8] 00 = Input 01 = Output
10 = I2SSDO 11 = I2SSDI
GPE3 [7:6] 00 = Input 01 = Output
10 = I2SSDI 11 = nSS0
GPE2 [5:4] 00 = Input 01 = Output
10 = CDCLK 11 = Reserved
GPE1 [3:2] 00 = Input 01 = Output
10 = I2SSCLK 11 = Reserved
GPE0 [1:0] 00 = Input 01 = Output
10 = I2SLRCK 11 = Reserved