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ARM920T PROCESSOR PROGRAMMER'S MODEL
2-13
REGISTER 3: DOMAIN ACCESS CONTROL REGISTER
Register 3 is the read/write domain access control register consisting of sixteen 2-bit fields. Each of these 2-bit fields
defines the access permissions for the domains shown in Table 2-13.
Table 2-13. Register 3: Domain Access Control
Register Bits Domain
31:30 D15
29:28 D14
27:26 D13
25:24 D12
23:22 D11
21:20 D10
19:18 D9
17:16 D8
15:14 D7
13:12 D6
11:10 D5
9:8 D4
7:6 D3
5:4 D2
3:2 D1
1:0 D0
The encoding of the two bit domain access permission field is given in Table 3-5 on page 3-19. The following
instructions can be used to access the domain access control register:
MRC p15, 0, Rd, c3, c0, 0; read domain 15:0 access permissions
MCR p15, 0, Rd, c3, c0, 0; write domain 15:0 access permissions