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S3C2410A ELECTRICAL DATA
24-27
XSCLK
tXRS
tXRS
tCADL
tCADH
tXAD
XnXDREQ
XnXDACK
Read Write
Min. 3SCLK
Figure 24-29. External DMA Timing (Handshake, Single transfer)
VSYNC
HSYNC
VDEN
Tf2hsetup
Tf2hhold
Tvspw Tvbpd
Tvfpd
HSYNC
VCLK
VD
VDEN
LEND
Tl2csetup Tvclkh Tvclk
Tvclkl Tvdhold
Tvdsetup Tve2hold
Tle2chold
Tlewidth
Figure 24-30. TFT LCD Controller Timing