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I/O PORTS S3C2410A
9-20
MISCELLANEOUS CONTROL REGISTER (MISCCR)
Pads related USB are controlled by this register for USB host, or for USB device.
Register Address R/W Description Reset Value
MISCCR 0x56000080 R/W Miscellaneous control register 0x10330
MISCCR Bit Description
Reserved [21:20] Reserved to 00b
nEN_SCKE [19] 0: SCKE = Normal 1: SCKE = L level
Used to protect SDRAM during the Power_OFF moe.
nEN_SCLK1 [18] 0: SCLK1 = SCLK 1: SCLK1 = L level
Used to protect SDRAM during the Power_OFF moe.
nEN_SCLK0 [17] 0: SCLK0 = SCLK 1: SCLK0 = L level
Used to protect SDRAM during the Power_OFF moe.
nRSTCON [16] nRSTOUT software control (SW_RESET)
0: nRSTOUT = 0, 1: nRSTOUT = 1.
Reserved [15:14] Reserved to 00b
USBSUSPND1 [13] [13] USB Port 1 mode
0 = Normal 1= Suspend
USBSUSPND0 [12] [12] USB Port 0 mode
0 = Normal 1= Suspend
Reserved [11] Reserved to 0b
CLKSEL1 [10:8] CLKOUT1 output singnal source
000 = MPLL CLK 001 = UPLL CLK 010 = FCLK
011 = HCLK 100 = PCLK 101 = DCLK1
11x = Reserved
Reserved [7] 0
CLKSEL0 [6:4] CLKOUT0 output singnal source
000 = MPLL CLK 001 = UPLL CLK 010 = FCLK
011 = HCLK 100 = PCLK 101 = DCLK0
11x = Reserved
USBPAD [3] 0 = Use pads related USB for USB device
1 = Use pads related USB for USB host
Reserved [2] Reserved to 0b.
SPUCR_L [1] DATA[15:0] port pull-up resister
0 = Enabled 1 = Disabled
SPUCR_H [0] DATA[31:16] port pull-up resister
0 = Enabled 1 = Disabled
NOTE: CLKOUT is prepared only for monitoring an internal clock situation (On/Off status or frequency).