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ARM920T PROCESSOR MMU
3-23
PERMISSION FAULT
If the 2-bit domain field returns 01 (client) then access permissions are checked as follows:
Section If the level one descriptor defines a section-mapped access, the AP bits of the
descriptor define whether or not the access is allowed according to Table 3-6 on
page 3-20.
Their interpretation is dependent upon the setting of the S and R bits (control
register bits 8 and 9). If the access is not allowed, a section permission fault is
generated.
Large page, small page If the level one descriptor defines a page-mapped access and the level two
descriptor is for a large or small page, four access permission fields (ap3-ap0)
are specified, each corresponding to one quarter of the page. Hence, for small
pages ap3 is selected by the top 1KB of the page and ap0 is selected by the
bottom 1KB of the page. For large pages, ap3 is selected by the top 16KB of the
page and ap0 is selected by the bottom 16KB of the page.
The selected AP bits are then interpreted in exactly the same way as for a
section (see Table 3-6 on page 3-20), the only difference being the fault
generated is a page permission fault.
Tiny page If the level one descriptor defines a page-mapped access and the level two
descriptor is for a tiny page, the AP bits of the level one descriptor define
whether or not the access is allowed in the same way as for a section. The fault
generated is a page permission fault.