Samsung S3C2410A Microphone User Manual


 
S3C2410A LCD CONTROLLER
15-37
LCD Interrupt Pending Register
Register Address R/W Description Reset Value
LCDINTPND 0X4D000054 R/W Indicate the LCD interrupt pending register 0x0
LCDINTPND Bit Description Initial state
INT_FrSyn [1] LCD frame synchronized interrupt pending bit.
0 = The interrupt has not been requested.
1 = The frame has asserted the interrupt request.
0
INT_FiCnt [0] LCD FIFO interrupt pending bit.
0 = The interrupt has not been requested.
1 = LCD FIFO interrupt is requested when LCD FIFO reaches trigger
level.
0
LCD Source Pending Register
Register Address R/W Description Reset Value
LCDSRCPND 0X4D000058 R/W Indicate the LCD interrupt source pending register 0x0
LCDSRCPND Bit Description Initial state
INT_FrSyn [1] LCD frame synchronized interrupt source pending bit.
0 = The interrupt has not been requested.
1 = The frame has asserted the interrupt request.
0
INT_FiCnt [0] LCD FIFO interrupt source pending bit.
0 = The interrupt has not been requested.
1 = LCD FIFO interrupt is requested when LCD FIFO reaches trigger
level.
0