S3C2410A CLOCK & POWER MANAGEMENT
7-3
Nand Flash
Controller
OSC
MPLL
UPLL
CLKCNTL
FCLK
HDIVN PDIVN
Mpll
Control
Signal
Upll
POWCNTL
F H P
USBCNTL
Test mode OM[1:0]
Bus
Controller
Memory
Controller
Arbitration
DMA 4ch
ExtMaster
WDT I
2
S SDI ADC UART(0,1,2)
PWM I
2
C GPIO RTC SPI(0,1)
USB
Device
ARM920T
Interrupt
Controller
LCD
Controller
H_LCD
P_SDI
P_GPIO
P_ADC
P_RTC
P_UART
P_SPI
P_I
2
C
P_I
2
CP_PWM
P_USB
H_Nand
FCLK
PCLK
HCLKUCLK
Power
Management
Block
MPLL CLK
UPLL CLK
HCLK
PCLK
FCLK
CLKOUT
XTIpll
XTOpll
EXTCLK
P[5:0]
M[7:0]
S[1:0]
OM[3:2]
P[5:0]
M[7:0]
S[1:0]
USB Host I/F
H_USB
TIC
Figure 7-1. Clock Generator Block Diagram