Filter
Top Products
MMU ARM920T PROCESSOR
3-20
Table 3-6 shows how to interpret the access permission (AP) bits and how their interpretation is dependent upon the
S and R bits (control register bits 8 and 9).
Table 3-6. Interpreting Access Permission (AP) Bits
AP S R Supervisor
Permissions
User
Permissions
Notes
00 0 0 No access No access Any access generates a
permission fault
00 1 0 Read only No access Supervisor read only permitted
00 0 1 Read only Read only Any write generates a
permission fault
00 1 1 Reserved
01 x x Read/write No access Access allowed only in
supervisor mode
10 x x Read/write Read only Writes in user mode cause
permission fault
11 x x Read/write Read/write All access types permitted in
both modes.
xx 1 1 Reserved