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MMC/SD/SDIO HOST CONTROLLER S3C2410A
19-2
BLOCK DIAGRAM
CMD Reg
(5byte)
Resp Reg
(17byte)
CMD Control
8bit Shift Reg
CRC7
Prescaler
FIFO
(64byte)
DAT Control
32bit Shift Reg
CRC16*4
DMA
INT
APB
I/F
32
32
8
8
32
32
32
32
32
32
PADDR
PSEL
PCLK
PWDATA
[31:0]
PRDATA
[31:0]
DREQ
DACK
INT
TxCMD
RxCMD
SDCLK
TxDAT[3:0]
RxDAT[3:0]
Figure 19-1. Block Diagram