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S3C2410A CLOCK & POWER MANAGEMENT
7-21
CLOCK CONTROL REGISTER (CLKCON)
Register Address R/W Description Reset Value
CLKCON 0x4C00000C R/W Clock generator control register 0x7FFF0
CLKCON Bit Description Initial State
SPI [18] Control PCLK into SPI block. 0 = Disable, 1 = Enable 1
IIS [17] Control PCLK into IIS block. 0 = Disable, 1 = Enable 1
IIC [16] Control PCLK into IIC block. 0 = Disable, 1 = Enable 1
ADC (&Touch Screen) [15] Control PCLK into ADC block. 0 = Disable, 1 = Enable 1
RTC [14] Control PCLK into RTC control block.
Even if this bit is cleared to 0, RTC timer is alive.
0 = Disable, 1 = Enable
1
GPIO [13] Control PCLK into GPIO block. 0 = Disable, 1 = Enable 1
UART2 [12] Control PCLK into UART2 block. 0 = Disable, 1 = Enable 1
UART1 [11] Control PCLK into UART1 block. 0 = Disable, 1 = Enable 1
UART0 [10] Control PCLK into UART0 block. 0 = Disable, 1 = Enable 1
SDI [9] Control PCLK into SDI interface block.
0 = Disable, 1 = Enable
1
PWMTIMER [8] Control PCLK into PWMTIMER block.
0 = Disable, 1 = Enable
1
USB device [7] Control PCLK into USB device block.
0 = Disable, 1 = Enable
1
USB host [6] Control HCLK into USB host block.
0 = Disable, 1 = Enable
1
LCDC [5] Control HCLK into LCDC block.
0 = Disable, 1 = Enable
1
NAND Flash Controller [4] Control HCLK into NAND Flash Controller block.
0 = Disable, 1 = Enable
1
POWER_OFF [3] Control Power Off mode of S3C2410.
0 = Disable, 1 = Transition to Power_OFF mode
0
IDLE BIT [2] Enter IDLE mode. This bit is not cleared automatically.
0 = Disable, 1 = Transition to IDLE mode
0
Reserved [1] Reserved 0
SM_BIT [0] SPECIAL mode.
'0' is recommended normally.
This bit can be used to enter SPECIAL mode in only the
special condition, OM3=1 & wake-up by nRESET. Please
contact us to use this bit.
0