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ARM920T PROCESSOR MMU
3-19
DOMAIN ACCESS CONTROL
MMU accesses are primarily controlled via domains. There are 16 domains and each has a 2-bit field to define
access to it. Two types of user are supported, clients and managers. See Table 3-5. The domains are defined in the
domain access control register. Figure 3-10 illustrates how the 32 bits of the register are allocated to define the 16 2-
bit domains.
31 19 1516 111221 20
2
8 7 4 3 0
5 412
26 25 24 23 10 9 5
1 0
2 1
6789
13141718
11 10
22
313
27282930
1415
6
Figure 3-10. Domain Access Control Register Format
Table 3-5 defines how the bits within each domain are interpreted to specify the access permissions
Table 3-5. Interpreting Access Control Bits in Domain Access Control Register
Value Meaning Notes
00 No Access Any access will generate a domain fault.
01 Client Accesses are checked against the access permission bits in the
section or page descriptor.
10 Reserved Reserved. Currently behaves like the no access mode.
11 Manager Accesses are not checked against the access permission bits so a
permission fault cannot be generated.