Filter
Top Products
DMA S3C2410A
8-4
Demand/Handshake Mode Comparison
Demand and Handshake modes are related to the protocol between XnXDREQ and XnXDACK. Figure 8-2 shows the
differences between the two modes.
At the end of one transfer (Single/Burst transfer), DMA checks the state of double-synched XnXDREQ.
Demand Mode
— If XnXDREQ remains asserted, the next transfer starts immediately. Otherwise it waits for XnXDREQ to be
asserted.
Handshake Mode
— If XnXDREQ is deasserted, DMA deasserts XnXDACK in 2cycles. Otherwise it waits until XnXDREQ is
deasserted.
CAUTION
XnXDREQ has to be asserted (low) only after the deassertion (high) of XnXDACK.
Demand Mode
XSCLK
XnXDACK
XnXDACK
XnXDREQ
XnXDREQ
Double synch
Handshake Mode
Actual
Transfer
1st Transfer 2nd Transfer
Double synch 2cycles
2cycles
Read Write
~
~
~
~
BUS
Acquisiton
Read Write
~
~
~
~
2cycles
Read Write
~
~
~
~
Figure 8-2. Demand/Handshake Mode Comparison