Filter
Top Products
I/O PORTS S3C2410A
9-8
I/O PORT CONTROL REGISTER
PORT A CONTROL REGISTERS (GPACON/GPADAT)
Register Address R/W Description Reset Value
GPACON 0x56000000 R/W Configure the pins of port A 0x7FFFFF
GPADAT 0x56000004 R/W The data register for port A Undefined
Reserved 0x56000008 – Reserved Undefined
Reserved 0x5600000C – Reserved Undefined
GPACON Bit Description
GPA22 [22] 0 = Output 1 = nFCE
GPA21 [21] 0 = Output 1 = nRSTOUT
(nRSTOUT = nRESET & nWDTRST & SW_RESET(MISCCR[16]))
GPA20 [20] 0 = Output 1 = nFRE
GPA19 [19] 0 = Output 1 = nFWE
GPA18 [18] 0 = Output 1 = ALE
GPA17 [17] 0 = Output 1 = CLE
GPA16 [16] 0 = Output 1 = nGCS5
GPA15 [15] 0 = Output 1 = nGCS4
GPA14 [14] 0 = Output 1 = nGCS3
GPA13 [13] 0 = Output 1 = nGCS2
GPA12 [12] 0 = Output 1 = nGCS1
GPA11 [11] 0 = Output 1 = ADDR26
GPA10 [10] 0 = Output 1 = ADDR25
GPA9 [9] 0 = Output 1 = ADDR24
GPA8 [8] 0 = Output 1 = ADDR23
GPA7 [7] 0 = Output 1 = ADDR22
GPA6 [6] 0 = Output 1 = ADDR21
GPA5 [5] 0 = Output 1 = ADDR20
GPA4 [4] 0 = Output 1 = ADDR19
GPA3 [3] 0 = Output 1 = ADDR18
GPA2 [2] 0 = Output 1 = ADDR17
GPA1 [1] 0 = Output 1 = ADDR16
GPA0 [0] 0 = Output 1 = ADDR0
GPADAT Bit Description
GPA[22:0] [22:0] When the port is configured as output port, the pin state is the same as the
that of the corresponding bit.
When the port is configured as functional pin, undefined value will be read.