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ARM920T PROCESSOR CACHES, WRITE BUFFER
4-9
DATA CACHE ORGANIZATION
The DCache is organized as 8 segments, each containing 64 lines, and each line containing 8-words. The line's
position within its segment is a number from 0 to 63 which is called the index. A line in the cache can be uniquely
identified by its segment and index. The index is independent of the line's virtual address. The segment is selected
by bits [7:5] of the virtual address of the line.
Bits [4:2] of the virtual address specify which word within a cache line is accessed. For halfword operations, bit [1] of
the virtual address specifies which halfword is accessed within the word. For byte operations, bits [1:0] specify which
byte within the word is accessed.
Bits [31:8] of the virtual address of the each cache line is called the TAG. The virtual address TAG is stored in the
cache along with the 8-words of data, when the line is loaded by a linefill.
Cache lookups compare bits [31:8] of the modified virtual address of the access with the stored TAG to determine
whether the access is a hit or miss. The cache is therefore said to be virtually addressed.
DATA CACHE LOCKDOWN
Data can be locked into the DCache causing the DCache to guarantee a hit, and providing optimum and predictable
execution time.
When no data is locked in the DCache, and a linefill occurs, the replacement algorithm chooses a victim cache line
to be replaced by selecting an index in the range (0 to 63). The segment is specified by bits [7:5] of the virtual
address of the data access which missed.
Data is locked into the DCache by restricting the range of victim numbers produced by the replacement algorithm, so
that some cache lines are never selected as victims. The base pointer for the DCache victim generator can be set by
writing to CP15 register 9. The replacement algorithm chooses a victim cache line in the range (base to 63), locking
in the cache the lines with index in the range (0 to base - 1).
Data is loaded and locked into the DCache by first ensuring the data to be locked is not already in the cache. This
can be ensured by cleaning and flushing either the whole DCache or specific lines. A short software routine can then
be used to load the data into the DCache.
The software routine to load the data operates by writing to CP15 register 9 to force the replacement counter to a
specific DCache line and then executing a load instruction to perform a cache lookup. This will miss and a linefill will
be performed, bringing 8 words of data into the cache line specified by the replacement counter, in the segment
specified by bits [7:5] of the modified virtual address accessed by the load.
To load further lines into the cache, the software routine can loop performing one load from each line to be loaded. As
each line contains 8 words, each loop should add 32 (bytes) to the load address. The software routine needs to move
the victim counter to the next index after it has loaded a line into the last available segment with the current index.
As there are 8-segments, this will occur after 8-cache lines have been loaded.
Once all the data has been loaded, it is locked by writing to CP15 register 9 to move the replacement counter base
to be one higher than the highest index of the locked cache lines.
The software routine that loads and locks the data in the DCache can be located in a cacheable region of memory
providing it does not contain any loads or stores other than the loads which are used to bring the data to be locked
into the DCache. The data to be loaded must be from a memory region which is cacheable.